276 / 2017-12-05 20:47:40
Failure Models of SiC MOSFET and SiC JFET
Final Paper
Yuming Zhou / Anhui University of Technology
In this submission, the failure models of two SiC devices, MOSFET and JFET, have been presented. Models are constituted based on conventional sub-circuit models, but leakage current models are incorporated to accurately reproduce the mechanism which leads to the device self-heating. Additionally, the channel current for two models is integrated with advanced mobility models characterized with temperature and electric-field dependent. Two failure models are validated with vigorous TCAD simulation and experimental data. Under same voltage level, the short-circuit robustness of SiC JFET is higher than that of SiC MOSFET.
Important Date
  • Conference Date

    May 17

    2018

    to

    May 19

    2018

  • Dec 08 2017

    Abstract Submission Deadline

  • Jan 30 2018

    Abstract Notification of Acceptance

  • Feb 10 2018

    Draft paper submission deadline

  • Feb 10 2018

    Final Paper Deadline

  • May 19 2018

    Registration deadline

Sponsored By
IEEE
Organized By
Xi'an Jiaotong University
Xidian University
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