322 / 2017-12-08 19:54:39
Layout of Series-connected SiC MOSFET Devices for Medium Voltage Applications
Final Paper
Li Chengmin / Zhejiang University
Renju Zheng / College of electrical engineering, Zhejiang University
Wuhua Li / College of electrical engineering, Zhejiang University
Huan Yang / College of electrical engineering, Zhejiang University
Xiangning He / College of electrical engineering, Zhejiang University
Weifeng Hu / State Grid Jiangsu Electric Power Co., Ltd.
A rated 9.6kV, 450A half-bridge module composed of eight series-connected 1.2kV SiC power MOSFETs is constructed. The key layout considerations in terms of the electrical, thermal and insulation issues are specially addressed from the application perspective. At first, the influence of the parasitic parameters and temperature variation on voltage imbalance of the series connected devices is analyzed briefly to guide the design of the layout. Then split heatsink scheme is adopted to enable reliable insulation. Meanwhile a balanced liquid cooling system is designed and verified at 180℃ operation. Afterwards the laminated busbar with a 62% stray inductance reduction compared with discrete busbar is proposed. Finally, an optimized layout of the snubber circuit is demonstrated with facilitated voltage balance benefit. The proposed module functions as a single SiC 9.6kV/450A half bridge module and can be adopted in the medium voltage converters flexibly.
Important Date
  • Conference Date

    May 17

    2018

    to

    May 19

    2018

  • Dec 08 2017

    Abstract Submission Deadline

  • Jan 30 2018

    Abstract Notification of Acceptance

  • Feb 10 2018

    Draft paper submission deadline

  • Feb 10 2018

    Final Paper Deadline

  • May 19 2018

    Registration deadline

Sponsored By
IEEE
Organized By
Xi'an Jiaotong University
Xidian University
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