335 / 2017-12-08 23:02:56
A SiC MOSFET based High-voltage Series-connected Devices
Final Paper
xijun ni / Nanjing Institute of Technology
This paper proposes an innovative 3.6kV device topology, based on three 1200V SiC MOSFETs in series, while only needs one standard gate driver and some auxiliary components. In addition, this circuit can lower the positive driver voltage drops on turn-on interval, which can reduce the conducting losses. It also lowers the turn-on losses by recycling the energy of balancing capacitor to gate terminal. Furthermore, it removes the avalanch mode zener diodes and avoids operating at avalanch mode to improve efficiency, comparing to the conventional JFET superCascode. Furthermore, It also achieves higher reliability than hybird FREEDM superCascode with normally off MOSFETs.
Important Date
  • Conference Date

    May 17

    2018

    to

    May 19

    2018

  • Dec 08 2017

    Abstract Submission Deadline

  • Jan 30 2018

    Abstract Notification of Acceptance

  • Feb 10 2018

    Draft paper submission deadline

  • Feb 10 2018

    Final Paper Deadline

  • May 19 2018

    Registration deadline

Sponsored By
IEEE
Organized By
Xi'an Jiaotong University
Xidian University
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