346 / 2017-12-09 02:11:00
Evaluation of 1.2 kV SiC MOSFETs in Modular Multilevel Cascaded H-Bridge Three-Phase Inverter for Medium Voltage Grid Application
Modular Multilevel Converters, SiC MOSFETs Modules, Gate Drivers, Passive Elements, EMI
Final Paper
Janviere Umuhoza / UNIVERSITY OF ARKANSAS
Haider Mhiesan / UNIVERSITY OF ARKANSAS
Chris Farnell / UNIVERSITY OF ARKANSAS
Kenneth Mordi / UNIVERSITY OF ARKANSAS
Alan Mantooth / UNIVERSITY OF ARKANSAS
This paper describes a study evaluating 1.2 kV SiC MOSFETs in modular multilevel cascaded H-bridge(CHB) three-phase inverter for medium voltage grid applications. The main purpose of this topology is to remove the need of a bulk 60 Hz transformer that is normally used to step up the output of a voltage source inverter to the medium voltage level. Using voltage SiC devices (1.2 kV ~ 6.5 kV SiC MOSFETs), with their high breakdown voltage, enables the system to meet and withstand the medium voltage stress, with a minimized number of cascaded modules. The SiC-based power electronics, when used in the presented topology, they significantly reduce the complexity usually faced when Si devices are used to meet the medium voltage level and the power scalability. The simulation and experimental results, performed on a low-voltage prototype, verify the nine-level CHB topology that is presented in this paper
Important Date
  • Conference Date

    May 17

    2018

    to

    May 19

    2018

  • Dec 08 2017

    Abstract Submission Deadline

  • Jan 30 2018

    Abstract Notification of Acceptance

  • Feb 10 2018

    Draft paper submission deadline

  • Feb 10 2018

    Final Paper Deadline

  • May 19 2018

    Registration deadline

Sponsored By
IEEE
Organized By
Xi'an Jiaotong University
Xidian University
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