The 15th IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

347 / 2019-02-18 14:23:59

A New Multilevel Interpolated TDC Method Based on a Two-Step Synchronizer

time-to-digital converter,synchronizer

Plenary track > Digital Circuits

A new multi-level time-to-digital converter (TDC) method capable of reaching high linearity and long dynamic range is presented in this paper. The method is based on a coarse counter and a two-level interpolator with a two-step synchronizer. This method solves the misalignment problem and guarantees synchronized and compatible total results. The synchronizer avoids the metastability problem. With simulated 45% reduced minimum unit delay, the compensating delay line is shortened in coarse residue restoration. This work could be easily assembled in a multi-channel TDC chip and is aimed for applications such as APD based 3-D ranging.