The 15th IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

422 / 2019-02-26 17:19:39

A Dominant Gate Insertion Algorithm Implementation for Logic Locking in IP Protection

Hardware Security,Logic Locking,Hamming Distance,Key Sensitization,Dominant Gate Insertion Algorithm

Plenary track > Information System

Logic locking manages different logic gates insertion as key-gates along with the key-inputs after location calculation for IP protection. This paper presents a dominant gate algorithm to achieve the security standard of logic locking, which managed the Hamming Distance(HD) exceed 50% while exempt from the key sensitization concurrently. It shows a comprehensive defense ability from the perspective of the general security standard. The results prove that it can simultaneously maintain the mutual interference of the key-inputs and maximize the ambiguity of the output on various benchmark circuits with a reasonable area overhead below 5%.