The 15th IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

478 / 2019-02-27 23:50:37

Low-Loss SOI-LIGBT With Assistant-Depletion Trench and Partial P-type Buried Layer

SOI-LIGBT,assistant-depletion trench,partial P-type buried layer,turn-off speed,turn-off loss

Plenary track > Power Electronics

In this paper, a high-voltage silicon-on-insulator lateral insulated gate bipolar transistor (SOI-LIGBT) for high turn-off speed and low turn-off loss (EOFF) is proposed. The device features an Assistant-Depletion Trench (ADT) shorted with the P+ emitter and a partial P-type Buried Layer (PBL) at the bottom of the drift region. The ADT together with the PBL accelerates the depletion of the drift region, which benefits to fast extraction of stored carrier during turn-off period. The simulations demonstrate that the proposed SOI-LIGBT exhibits a superior tradeoff between turn-off loss (EOFF) and on-state voltage drop (VON) to the conventional SOI-LIGBT. EOFF of the proposed SOI-LIGBT is 69% lower than that of the conventional SOI-LIGBT at the same VON of 1.53 V.