The 15th IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

545 / 2019-03-14 16:45:13

FPGA Accelerated DAN Algorithm with Weight Decomposition for Face Alignment

DAN,face algnment,weight decomposition,FPGA

Plenary track > Artificial Intelligence Circuit and System

The Deep Alignment Network(DAN), which is based on the deep neural network architecture, performs better over existing face alignment algorithms, especially in large pose situation. In this paper, a weight decomposition method is introduced to reduce the original algorithm's computation complexity by 35.4% and weight storage by 33.3% without sacrificing algorithm accuracy. Also, an efficient processing elements(PE) allocation and a general reuse mechanism are designed to reduce memory access and improve PE utilization. The DAN algorithm is implemented on Virtex-7 2000T platform and its resource efficiency and energy efficiency on FPGA are 0.00327GOP/s/Slices and 46.7 GOP/s/W, which are 1.25x and 2.2x higher than state-of-the-art methods.