A Gating Path Optimization Method for Press-Pack IGBT
ID:94 View Protection:ATTENDEE Updated Time:2020-10-29 11:22:54 Hits:833 Oral Presentation

Start Time:2020-11-02 15:30(Asia/Shanghai)

Duration:15min

Session:B Power Electronics Technology and Application » B1Session 3 and Session 8

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Abstract
IGBT devices are widely used in high-voltage and high-power applications. IGBT module has two kinds of packaging structure, which are welded IGBT and press-pack IGBT (PP-IGBT). Since a PP-IGBT module can integrate more chips and diode chips to obtain a large current capacity, it has been widely used in high power applications. However, due to the individual differences of chips in parallel, the stray parameters of the gating loops may be different, which leads to the imbalance of current and thermal problem of PP-IGBT, and eventually lead to the failure or even damage of the device. In this paper, some key factors resulting inconsistency of stray parameters in gating loops are reviewed, and a methodology to make the gating loops more consistent are proposed. The feasibility of the methodology is also verified by ANSYS software simulation.
Keywords
Driving loop layout, PP-IGBT, Stray parameter.
Speaker
Huaidong Min
Huazhong University of Science and Technology

Submission Author
Huaidong Min Huazhong University of Science and Technology
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Important Date
  • Conference Date

    Nov 02

    2020

    to

    Nov 04

    2020

  • Oct 27 2020

    Draft paper submission deadline

  • Nov 03 2020

    Contribution Submission Deadline

  • Nov 04 2020

    Registration deadline

  • Nov 17 2020

    Final Paper Deadline

Sponsored By
IEEE IAS Student Chapter of Huazhong University of Science and Technology (HUST)
Organized By
Huazhong University of Science and Technology
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