Impacts of Power Level on Parasitic Capacitance in Copper-Foiled Medium-Voltage Inductors
ID:111 View Protection:ATTENDEE Updated Time:2021-07-21 20:06:16 Hits:1103 Oral Presentation

Start Time:Pending(Asia/Shanghai)

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Abstract
Copper-foiled inductors are widely used in high-power applications. It is known that the parasitic capacitance in the inductor limits the best performance of wide-band-gap devices. Especially in copper-foiled medium-voltage inductors, the parasitic capacitance is larger due to the extensive interleaving area, extra insulation, and a larger number of turns. This digest is aimed at investigating the impacts of power level on parasitic capacitance in copper-foiled medium voltage inductors, where the power is scaled from 50 kW to 2 MW. Three different scaling laws will be discussed in the digest, which can provide design guidelines for future high-power copper-foiled inductors.
 
Keywords
Parasitic capacitance,copper foil,inductor,power level
Speaker
Hongbo Zhao
Aalborg University

Submission Author
Hongbo Zhao Aalborg University
Rui Wang Department of Energy Technology; Aalborg University
Dipen Dalal Aalborg University
Christian Lascu Aalborg University
Christian Uhrenfeldt Aalborg University
Bjørn Rannestad KK wind solution
Stig Munk-Nielsen Aalborg University
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Important Date
  • Conference Date

    Aug 25

    2021

    to

    Aug 27

    2021

  • Apr 21 2021

    Abstract Submission Deadline

  • May 15 2021

    Abstract Notification of Acceptance

  • Jun 25 2021

    Final Paper Deadline

  • Aug 24 2021

    Contribution Submission Deadline

  • Aug 27 2021

    Registration deadline

Sponsored By
IEEE
IEEE ELECTRONIC DEVICE SOCIETY
Organized By
Huazhong University of Science and Technology