Presentation Details
A High Power Density Chip-on-Chip Gan-based Module with Ultra-Low Parasitic Inductance
ID：77
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Updated Time：2021-07-21 20:05:55 Hits：1513
Oral Presentation
Start Time：2021-08-27 16:00（Asia/Shanghai）
Duration：15min
Session：Room1 Oral Session 1 »
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Abstract
A 650V/120A rated half-bridge chip-on-chip GaN module has been proposed in this paper. The chip-on-chip structure allows to distribute decoupling capacitors close to each device, which can equalize the dynamic turn-on current of parallel devices and reduce the drain-source voltage overshoot. The effect of parasitic inductance on parallel devices is analyzed and optimized. By double-sided cooling, the module shows good thermal performance.
Keywords
GaN,modular
Speaker
Yi Zhang
Huazhong University of Science and Technology；State Key Laboratory of Advanced Electromagnetic Engineering and TechnologySubmission Author
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Important Date
-
Conference Date
Aug 25
2021
toAug 27
2021
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Apr 21 2021
Abstract Submission Deadline
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May 15 2021
Abstract Notification of Acceptance
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Jun 25 2021
Final Paper Deadline
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Aug 24 2021
Contribution Submission Deadline
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Aug 27 2021
Registration deadline
Sponsored By
IEEE
IEEE ELECTRONIC DEVICE SOCIETY
IEEE ELECTRONIC DEVICE SOCIETY
Organized By
Huazhong University of Science and Technology
Contact Information
Previous Conferences
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2025-08-15 China Beijing
2025 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia -
2025-08-15 China Beijing
The 2025 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia -
2023-08-27 Taiwan, China Hsinchu
2023 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia -
2018-05-17 China xian
IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia
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