22 / 2021-09-25 10:01:43
A Novel Five-Level Carrier Phase Disposition Modulation Method for Parallel Three-Level Inverters Considering Circulating Current Suppression
Draft Accepted
Zhongrui Li / Naval University of Engineering
Ziling Nie / Naval University of Engineering
Sheng Ai / Naval University of Engineering
Jie Xu / Naval University of Engineering
Parallel operation of three-level inverters is a popular approach to achieve larger power capacity of the system. The interleaved operation can improve current distortion, but high-frequency circulating current inevitably emerges. To suppress the circulating current, this paper proposes a five-level carrier phase disposition modulation method for parallel three-level inverters. Based on the carrier phase disposition modulation, the parallel three-level inverters can be operated as a five-level system, and the pulse distribution is realized through the system state machine, which avoids complicated mathematical calculation. The simulation results verify that, compared with the interleaved operation, the proposed scheme has superior performance in term of circulating current suppression without increasing the output current harmonic.
Important Date
  • Conference Date

    Jul 11

    2023

    to

    Aug 18

    2023

  • Nov 10 2021

    Draft paper submission deadline

  • Dec 10 2021

    Registration deadline

  • Dec 11 2021

    Contribution Submission Deadline

Sponsored By
IEEE IAS
Organized By
IEEE IAS Student Chapter of Southwest Jiaotong University (SWJTU)
IEEE IAS Student Chapter of Huazhong University of Science and Technology (HUST)
IEEE PELS (Power Electronics Society) Student Chapter of HUST