Synchronized SVPWM With Half-Wave Symmetry Relaxation for Low-Switching-Frequency Three-Level NPC Inverter
ID:27 View Protection:PRIVATE Updated Time:2023-06-13 21:00:24 Hits:1066 Oral Presentation

Start Time:2023-06-18 10:20(Asia/Shanghai)

Duration:20min

Session:S Oral Session » S3Oral Session 3 & Oral Session 6

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Abstract
Half-wave symmetry (HWS) is generally considered as a necessary restriction when designing the switching sequences of synchronized SVPWM (SSVM), in order to eliminate even harmonic component and simplify analysis. However, the optimization space of switching sequences is reduced because of artificial restriction, which leads to suboptimal solutions. Furthermore, the pulse number can only be integer with the restriction of HWS, so the maximum allowable switching frequency of the inverter cannot be fully utilized. In this paper, SSVM with HWS relaxation for three-level NPC inverter is proposed. By optimizing switching sequences and allowing for noninteger pulse number, the proposed SSVM achieves lower harmonic distortion compared with conventional SSVM (CSSVM). The effectiveness of the proposed strategy is verified by simulations.
Keywords
Synchronized SVPWM;half-wave symmetry;noninteger pulse number;three-level NPC inverter;low switching frequency
Speaker
Wenyue Zheng
NCEPU

Yongchang Zhang

Yubin Wang

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  • Conference Date

    Jun 16

    2023

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    Jun 19

    2023

  • Jun 15 2023

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  • Jul 02 2023

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