116 / 1971-01-01 00:00:00
A Low-voltage Low-power Cmos Receiver Front-end For 2.4ghz Wsn Applications
low voltage, low power, front-end, CMOS, WSN
Draft Accepted
曾祺 王 / Jiangsu Provincial key Laboratory of Sensor Network Technology
智群 李 / Jiangsu Provincial key Laboratory of Sensor Network Technology
A low-voltage low-power CMOS receiver front-end composed of common-gate low noise amplifier (CG LNA) and active downconversion I/Q mixer for 2.4GHz wireless sensor network (WSN) applications is presented in this paper. To achieve high voltage gain and low noise figure under low supply voltage and low power consumption, the CG-LNA is based on the active transconductance (gm) boosting technique, and the current-reuse technique is utilized in the downconversion I/Q mixer design. Post-layout simulated results for 180nm CMOS implementations show the voltage gain is 24.2dB at 2.42GHz with a 3dB bandwidth from 2.16~2.63GHz and the average noise figure is 6.8dB within the entire 3dB bandwidth at high gain mode. The receiver front-end consumes 1.7mW from 1V DC supply, and the whole chip size is 0.59mm2 (test circuits and pads included).
Important Date
  • Conference Date

    Nov 17

    2014

    to

    Nov 19

    2014

  • Oct 10 2014

    Draft paper submission deadline

  • Oct 31 2014

    Final Paper Deadline

  • Nov 19 2014

    Registration deadline

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