Abstract Details
118 / 1971-01-01 00:00:00
MIMO Channel Emulator Developed for Performance Evaluation of LTE Systems
5108,3632,5109
Draft Accepted
This paper presents a compact reconfigurable hardware-based MIMO channel emulator that supports a relative large number of propagation paths. A time-multiplexed implementation strategy is
utilized to provide a compact design suitable for MIMO channel emulation. Meanwhile, the complexity is reduced by preprocessing the channel parameters under emulation with hardware/software partitioning. A 2x2 MIMO channel emulator is synthesized on a single Xilinx Virtex-5 XC5VSX95T FPGA and can be used for the performance evaluation of 3GPP Long Term Evolution (LTE) systems, such as the Radio Resource Management (RRM) conformance testing. The scalable design of the MIMO emulator enables a straightforward implementation of much more complicated MIMO channel with more antennas.
utilized to provide a compact design suitable for MIMO channel emulation. Meanwhile, the complexity is reduced by preprocessing the channel parameters under emulation with hardware/software partitioning. A 2x2 MIMO channel emulator is synthesized on a single Xilinx Virtex-5 XC5VSX95T FPGA and can be used for the performance evaluation of 3GPP Long Term Evolution (LTE) systems, such as the Radio Resource Management (RRM) conformance testing. The scalable design of the MIMO emulator enables a straightforward implementation of much more complicated MIMO channel with more antennas.
Important Date
-
Conference Date
Nov 17
2014
toNov 19
2014
-
Oct 10 2014
Draft paper submission deadline
-
Oct 31 2014
Final Paper Deadline
-
Nov 19 2014
Registration deadline
Sponsored By
IEEE
Contact Information
- Miss Chris
- ch******@ieee-ghtce.org
- 86-********
- 86-*********
