150 / 2015-11-06 18:29:27
REVIEW PAPER ON ADAPTIVE FILTERS USING VLSI
Final Paper
Shrikant Honade / G H Raisoni College of Engineering & Management, Amravati
Prashant Ingole / G H Raisoni College of Engineering & Management, Amravati
Now a day, optimization is one of the emerging and fastest growing fields in the area of Very Lagre Scale Integrated Circuits (VLSI). In real time environment, there are certain situations where the apriori information about the statistics of signal to be processed is not known completely, so in such situations adaptive filters are preferred. This paper deals with the survey of design of adaptive filters using low power adder and multipliers using Very Large Scale Integrated Circuits. The evaluation of power, area and speed for different types of adders and multipliers will be taken into account and the adaptive filter will be designed with efficient combination of adders and multipliers for low power and high speed applications. Various tools will be used for the design of the adaptive filters. The performance analysis of the proposed method will also be done in terms of speed, area, power consumption and hardware requirements.
Important Date
  • Conference Date

    Mar 23

    2016

    to

    Mar 25

    2016

  • Nov 30 2015

    Early Bird Registration

  • Dec 30 2015

    Draft paper submission deadline

  • Jan 30 2016

    Draft Paper Acceptance Notification

  • Feb 05 2016

    Final Paper Deadline

  • Mar 25 2016

    Registration deadline

Sponsored By
IEEE Madras Section
SSN College of Engineering - SSN Trust
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