145 / 2016-11-10 14:13:00
A 20 Gb/s Equalizer with Adaptive CTLE and Look-ahead DFE in 0.13µm Technology
11785
Draft Accepted
Yinhang Zhang / Institute of RF- & OE-ICs
This paper presents a 20 Gb/s receive equalizer including an adaptive continuous time linear equalizer (CTLE) and 2-taps look-ahead decision feedback equalizer (DFE) in 0.13µm BiCMOS technology for high speed serial link. The CTLE can adjust the ratio of high frequency and low frequency components adaptively by detecting the energy at both ends of a slicer and then generating a control signal by a integrator. Following the CTLE is a half-rate look-ahead DFE which can get better tradeoff between the working speed and design complexity especially for the case of 20 Gb/s or above data rate. The chip area including pads is about 1.08×1.11mm2 and the power consumption is about 758mW. Post simulation results show that the horizontal eye opening of the equalized data can be up to 0.9 UI at 20 Gb/s.
Important Date
  • Conference Date

    Mar 25

    2017

    to

    Mar 26

    2017

  • Nov 10 2016

    Draft paper submission deadline

  • Nov 20 2016

    Draft Paper Acceptance Notification

  • Nov 30 2016

    Final Paper Deadline

  • Mar 26 2017

    Registration deadline

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IEEE Beijing Section
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