261 / 2017-01-23 13:31:51
Design and Implementation of Digital Compensation Method for the Drooping Sinc Response of Sigma Delta ADCs
Sinc Filter ,Sigma Delta ADC,FIR FIlter,PIC MIcrocontroller
Final Paper
Keerthi E / JNTUCEA
Aruna S / JNTUCEA
Data Acquisition Systems (DAS) of the present day use Sigma Delta Analog to Digital (A/D) Converters to achieve efficient performance. These Sigma Delta converter uses inbuilt Sinc filter (low pass) of order 3 to eliminate high frequency noise shaped by them. Sinc filters are also known as Cascaded Integrated Comb (CIC) filters. Sinc Filter realization in hardware devices is efficient and economical, since its implementation does not require multiplication. However, these filters experience the problem of pass band droop (non-flat pass band), which increases with increasing order of the filter and also from stop band ripples. This paper proposes the design and implementation of additional equiripple FIR filter to compensate the pass band droop in response of Sinc filter. It is possible to implement this design without using the multiplier unit in any simple Microcontroller such as PIC Microcontroller. The FIR Filter has been designed using MATLAB and implemented using MPLAB Environment. The Sinc Filter and the FIR Filter are arranged in a cascaded form and the compensated response is the product of the Sinc and FIR Filter. The results of the implemented Compensator Filter in the PIC Microcontroller of the DAU are being discussed. This implementation is advantageous for the high resolution telemetry system which uses embedded Sigma delta converters along with microcontroller or DSP processors over the existing Sinc Filters.
Important Date
  • Conference Date

    Mar 22

    2017

    to

    Mar 24

    2017

  • Feb 15 2017

    Draft paper submission deadline

  • Feb 20 2017

    Draft Paper Acceptance Notification

  • Feb 22 2017

    Final Paper Deadline

  • Mar 24 2017

    Registration deadline