304 / 2017-12-08 09:52:06
A 10kV 4H-SiC PiN Diode with Gradual Doping Buffer Layers and p+ Adjusting Regions at Cathode
4H-SiC,PiN Diode,adjusting region,gradual varied doping
Final Paper
Wang cailin / Xi'an University of Technology
This paper presents a novel 4H-SiC PiN Diode with gradual doping n-buffer layers and p+ adjusting regions to improve the relation between on-state and reverse recovery characteristics at 10kV class. Compared with the conventional SiC PiN diode with homogeneous doping n-buffer layer, the novel structure shows about 275% increment in softness factor. Even under the overstress condition, the novel structure does not show the current voltage oscillation. And the on-state forward voltage drop just increases by 0.3V at 100A/cm2. Finally, the width ratio of p+ and n+ regions at cathode side are optimized to obtain the more uniform current distribution during conducting.
Important Date
  • Conference Date

    May 17

    2018

    to

    May 19

    2018

  • Dec 08 2017

    Abstract Submission Deadline

  • Jan 30 2018

    Abstract Notification of Acceptance

  • Feb 10 2018

    Draft paper submission deadline

  • Feb 10 2018

    Final Paper Deadline

  • May 19 2018

    Registration deadline

Sponsored By
IEEE
Organized By
Xi'an Jiaotong University
Xidian University
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