NANOARCH is the annual cross-disciplinary forum for the discussion of novel post-CMOS nanocomputing directions and emerging nanoscale CMOS. The symposium seeks papers on innovative ideas for solutions to the principal challenge facing integrated electronics in the 21st century - how to design, fabricate, and integrate nanosystems to overcome the fundamental limitations of CMOS. In particular, such systems could (1) contain unconventional nanodevices with unique capabilities, including directions beyond simple switches, (2) introduce new logic and memory concepts, (3) involve novel circuit styles, (4) introduce new concepts for computing, (5) reconfigure and/or mask faults at much higher rates than in CMOS, (6) explore security architectures with nanotechnology, (7) involve new paradigms for manufacturing, and (8) rethink the methodologies and design tools involved.
This 14th symposium aims to incorporate several exciting sessions on emerging computing paradigms (e.g., approximate, quantum, neuromorphic, molecular, spintronic), novel nano-based computing architectures, 2D materials (e.g., graphene) nanoelectronics and computing, beyond charge-based computing, emerging memory devices and in memory computing, nanoelectronics for biomedical systems, and to provide extended opportunities for interaction among the participants. In addition to 6-page length Regular Papers, we also invite 2-page Concept Papers presenting less developed but radical and highly innovative work in the area of nanofabrication, nanocomputing, and emerging nanosystem application.
NANOARCH 2018 topics of interest (both theoretical and experimental) include (but are not limited to):
Jul 17
2018
Jul 19
2018
Registration deadline
2017-07-25 United States Newport,USA
2017 IEEE/ACM International Symposium on Nanoscale Architectures2016-07-18 China Beijing,China
2016 IEEE/ACM International Symposium on Nanoscale Architectures2014-07-08 France
2014 IEEE/ACM International Symposium on Nanoscale Architectures2013-07-15 United States
2013 IEEE/ACM International Symposium on Nanoscale Architectures
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