Introduction
GENERAL PURPOSE OF THE CONFERENCE

The aim of ESSDERC and ESSCIRC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The increasing level of integration for system-on-chip design made available by advances in semiconductor technology is, more than ever before, calling for a deeper interaction among technologists, device experts, IC designers and system designers. While keeping separate Technical Program Committees, ESSDERC and ESSCIRC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both communities. Attendees registered for either conference are encouraged to attend any of the scheduled parallel sessions, regardless to which conference they belong.​​

CONFERENCE HIGHLIGHTS
  • ​3 Plenary presentations

  • 3 ESSDERC keynote presentations

  • 3 ESSCIRC keynote presentations

  • Invited papers with overall coverage of all aspects of advanced devices and circuits

  • Special Focus Sessions on
       - FDSOI
       - Power Electronics

  • Presentation of IEEE and ESSDERC/ESSCIRC Awards

  • ESSDERC/ESSCIRC Gala Dinner on Wednesday, September 5, 2018

  • Tutorials
       - The Future of Mobility: Reliability, Readiness & Robustness of Integrated Circuits
           Chapter 1: EOS & ESD
           Chapter 2: Reliability & Readiness of IC’s 
           Chapter 3: Mobility & Sensing
       - IC Design for Automotive
       - Ultra-Low Power Sensors for Condition Monitoring

  • Workshops
    The working language of the conference is English.

Call for paper

Important date

2018-04-03
Abstract submission deadline
2018-04-04
Draft paper submission deadline
2018-05-18
Draft paper acceptance notification
2018-06-01
Final paper submission deadline

CMOS Devices and Technology

CMOS scaling, Novel MOS device architectures; Circuit/device interaction and co-optimization; High-mobility channel devices; CMOS front-end or back-end processes; Interconnects; Integration of RF or photonic devices; 3D integration. Front-end and back-end manufacturing processes; 3D integration and wafer-level packaging; Reliability and characterization of materials, processes and devices; Advanced interconnects; ESD, latch-up, soft errors, noise and mismatch behavior, hot carrier effects, bias temperature instabilities, and EMI; Defect monitoring and control; Metrology; Test structures and methodologies; Manufacturing yield modeling, analysis and testing.

Opto-, Power and Microwave Devices

New device or process architectures; New phenomena and performance improvement of optoelectronic, high voltage, smart power, IGBT, microwave devices; Passive devices, antennas and filters (including Si, Ge, SiC, GaN); Optoelectronic devices including sensors, LEDs, semiconductor lasers; Photovoltaic devices; Studies of high temperature operation; IC cooling and packaging aspects. Reliability and characterization of materials, processes and devices.

Physical Modeling of Materials and Devices

Numerical, analytical and statistical modeling and simulation of electronic, optical or hybrid devices, the interconnect, isolation and 2D or 3D integration; Aspects of materials, fabrication processes and devices e.g. advanced physical phenomena (quantum mechanical and non-stationary transport phenomena, ballistic transport, …); Mechanical or electro-thermal modeling and simulation; DfM. Reliability of materials and devices.

Compact Modeling of Devices and Circuits

Compact/SPICE modeling of electronic, optical, organic, and hybrid devices and their IC implementation and interconnection. Topics include compact/SPICE models and their Verilog-A standardization of the semiconductor devices (including Bio/Med sensors, MEMS, Microwave, RF, High voltage and Power), parameter extraction, compact models for emerging technologies and novel devices, performance evaluation, reliability, variability, and open source benchmarking/implementation methodologies. Modeling of interactions between process, device, and circuit design as well as Foundry/Fabless Interface Strategies.

Memory Devices and Technology

Embedded and stand-alone memories; DRAM, FeRAM, MRAM, ReRAM, PCRAM, Flash, Nanocrystal and single/few-electron memories, Organic memories, NEMS-based devices, Selectors; Novel memory cell concepts and architectures, covering device  physics, reliability, process integration and manufacturability issues and including 3D NAND Flash, crosspoint arrays, and 3D systems integration; Devices and concepts for neuromorphic computing, memory-enabled logic and security applications.

Sensor Devices and Technology

Design, fabrication, modeling, reliability, packaging and smart systems integration of actuators (discrete SoC, SiP, or heterogenous 3D integration); MEMS, NEMS, optical, chemical or biological sensors; Display technologies; High-speed imagers; TFTs; Organic and flexible substrate electronics.

Emerging non-CMOS Devices and Technologies

Novel non-CMOS materials, processes and devices, (carbon-nanotubes, nanowires and nanoparticles, 2D materials, graphene, metal oxides, …) for electronic, optoelectronic, sensor & actuator applications; Reliability and characterization of materials, processes and devices; Molecular and quantum devices; Nanophotonics, plasmonics, spintronics, self-assembling methods; Energy harvesters; High frequency digital and analog devices including THz; New high-mobility channels (strained Si, Ge, SiGe).

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Important Date
  • Conference Date

    Sep 03

    2018

    to

    Sep 06

    2018

  • Apr 03 2018

    Abstract Submission Deadline

  • Apr 04 2018

    Draft paper submission deadline

  • May 18 2018

    Draft Paper Acceptance Notification

  • Jun 01 2018

    Final Paper Deadline

  • Sep 06 2018

    Registration deadline

Contact Information