Introduction

The scope of this conference is a very focused one with specific interest in compact modeling of silicon, Gallium Nitride and other composite materials based electron devices. Verilog A based modeling and simulation of analog and Digital systems is another core area of the conference. Circuit modeling for analog and Digital IC design and its application in fabrication of deep sub micron technology based integrated circuits is a key focus area. Hence the conference is named as Modeling of Systems, Circuits and Devices.

Call for paper

Important date

2018-10-15
Draft paper submission deadline
  • HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models.
  • MOS-AK Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - frontiers of the compact modeling for nm-scale MEMS designs and CMOS/SOI circuit simulation.
  • The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/SoC) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind the IC simulation in modern device models.

Submission Topics

Topics: to be covered include the following:
  • Advances in semiconductor technologies and processing
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • FOSS TCAD/EDA modeling and simulation
  • CM of passive, active, sensors and actuators
  • Emerging Devices, TFT CMOS and SOI-based memory cells
  • Organic, Bio/Med devices/technology modeling
  • Microwave, RF device modeling, HV/Power device modeling
  • Nanoscale CMOS devices and circuits
  • Technology R&D reliability/ageing, DFY, DFT and IC Designs
  • Foundry/Fabless Interface Strategies
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Important Date

  • Conference Date

    Feb 25

    2019

    to

    Feb 27

    2019

  • Oct 15 2018

    Draft paper submission deadline

  • Feb 27 2019

    Registration deadline

Contact Information
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