2021 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES)

Compilers for Embedded Systems: Compilation for power and performance; Compiler support for CPU, GPU, reconfigurable computing, heterogeneous and domain-specific multi-core SoC; Compilation for memory, storage, and on-chip communications.

Processor Architectures: Embedded and mobile processor micro-architecture, Multi- and many-core processors, GPU architectures, Reconfigurable computing including FPGAs and CGRAs, Application-Specific processor design, 3D-stacked architectures.

Memory and Storage: Memory system architecture; Non-volatile and other emerging memory technologies; Scratchpad memory, caches and compiler-controlled memories; storage organization including flash storage.

On-chip communication and I/O: Networks-on-chip architectures and design methodologies; on-chip communication synthesis, analysis, and optimization; I/O management in embedded systems.

Accelerators: Synthesis, optimization, and designspace exploration of high-performance, low-power accelerators; Novel design paradigms and compilers for accelerators including approximate computing, machine learning and big-data analytics.

Security, Reliability, and Predictability: Secure architectures, hardware security, and compilation for software security; Architecture and compiler techniques for reliability and aging; Modeling, design, analysis, and optimization for timing and predictability; Validation, verification, testing & debugging of embedded software.

AI Hardware and ML Applications: Architectures, accelerators, and compilers for artificial intelligence hardware; Applications of machine learning algorithm and techniques to embedded systems; Neuromorphic & cognitive computing, data analytics.

Emerging Applications: Biologically inspired computing; Flexible, stretchable, and flexible hybrid electronics (FHE); Augmented and virtual reality; Bioinformatics, and emerging topics on embedded systems.