A Low-Cost Quadruple-Node-Upset Self-Recoverable Latch Design
ID:29 View Protection:ATTENDEE Updated Time:2021-08-23 13:47:39 Hits:674 Oral Presentation

Start Time:2021-08-19 20:00(Asia/Shanghai)

Duration:20min

Session:SS Special Session » SS1B1. Fault Tolerant TSV and Latch Designs

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Abstract
With the continuous progress of semiconductor processes, the multiple-node upset (MNU) caused by radiation has become a major problem affecting chip reliability. To tolerate MNU, a low-cost quadruple-node-upset self-recoverable (LCQNUSR) latch is proposed in this paper, mainly consisting of six inverters and six four-input C-element (CEs), which are cross-connected to form a feedback loop. The latch make full use of the fault-tolerance property of the CEs to constitute a multi- level filtering mechanism, so that the latch provides complete quadruple-node-upset (QNU) self-recovery capability. Simulation results show that the proposed latch is not only QNU tolerant, but also self-recovering from QNU. In addition, due to the use of high-speed transmission path and clock gating techniques, the proposed latch reduces the delay-power-area product by about 88.89% compared to the latest MNU hardened latch.
Keywords
soft error;latch design;quadruple-node-upset;self-recoverability;C-element
Speaker
Yan Wen
Student ChangSha university of science and technology

 My name is Yan wen, I am a student in the Department of Computer and Communication Engineering at Changsha University of Science and Technology. The reaearch interest includes radiation hardening by design for nano-scale CMOS ICs,such as SRAM cells. I will reported the article A Low-Cost Quadruple-Node-Upset Self-Recoverable Latch Design. The instructor for this paper is Shuo Cai, Weizheng Wang, and the second author is Caicai Xie

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