Kelvin Bridge Structure Based TSV Test for Weak Faults
ID:50 View Protection:ATTENDEE Updated Time:2021-08-15 23:02:16 Hits:645 Oral Presentation

Start Time:2021-08-19 20:20(Asia/Shanghai)

Duration:20min

Session:SS Special Session » SS1B1. Fault Tolerant TSV and Latch Designs

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Abstract
Due to the immaturity of manufacturing process, TSV is vulnerable to a variety of defects, which brings new testing
challenges. Most of the existing test methods are suffer from the test resolution and difficult to detect weak faults. Borrowing the wisdom of Kelvin Bridge, a non-invasive test method is proposed to detect resistive open fault and leakage fault. By adjusting the resistances on the bridge arm to make them change in equal proportion, the adverse effects of contact resistance and parasitic resistance on the wire can be eliminated. HSPICE simulation using 45 nm CMOS technology show that it can successfully detect resistive open fault above 0.1 Ω and leakage fault below 10 MΩ. The effectiveness of the test scheme is further proved by process-voltage-temperature (PVT) analysis.


HAO CHANG was born in 1983 in China. He received B. S. in computer science and technology from Anhui University of Finance & Economics, Bengbu, China, in 2004. He received the M. S. and Ph.D. degree in computer science from Hefei University of Technology, Hefei, China, in 2007 and 2015, respectively. Now He is an associate professor in Department of Computer Science and Technology, Anhui University of Finance and Economics, Bengbu, China. Currently, his research interests cover 3D ICs integration and test, built-in self-test and fault tolerance.
Keywords
Three dimensional integrated circuits (3D ICs),;through silicon vias (TSVs),;Kelvin Bridge;resistive open fault;leakage fault
Speaker
Hao Chang
Anhui University of Finance & Economics

HAO CHANG was born in 1983 in China. He received B. S. in computer science and technology from Anhui University of Finance & Economics, Bengbu, China, in 2004. He received the M. S. and Ph.D. degree in computer science from Hefei University of Technology, Hefei, China, in 2007 and 2015, respectively. Now He is an associate professor in Department of Computer Science and Technology, Anhui University of Finance and Economics, Bengbu, China. Currently, his research interests cover 3D ICs integration and test, built-in self-test and fault tolerance.

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    2021

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    Aug 20

    2021

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