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SoC Testability and Its Application in Life Cycle Management
ID：70 View Protection：ATTENDEE Updated Time：2021-08-23 14:32:04 Hits：685 Oral Presentation

Start Time：2021-08-20 20:40（Asia/Shanghai）

Duration：20min

Session：IS Industrial Session » IS4B5. Industry Practice in SoC and Memory Test

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Abstract
Testability is designed and widely applied from post production testing to life cycle management(LCM) of chips.  This is defined as T0(Time Zero) to EOX(end of manufacture/service/life/etc.) in HUAWEI silicon LCM. This presentation will introduce various testing skills in use from silicon to functional level, as well as different testing methodologies across life-cycle stages.
 
Keywords
Testablity;LCM;System Level Test
Speaker
Yang Liu
FAE HISILICON

Mr. Yang Liu is currently a field application engineer at Hisilicon Semiconductor Ltd. He has focused on silicon's life cycle management for 13 years. He is familiar with chip fault analysing and DFx. Before joining Huawei, he got M.Sc degree from University of Southampton in UK and?B.Eng degree from Dalian University of Technology.

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Important Date

  • Conference Date

    Aug 18

    2021

    to

    Aug 20

    2021

  • May 10 2021

    Draft paper submission deadline

  • Aug 16 2021

    Early Bird Registration

  • Aug 19 2021

    Contribution Submission Deadline

  • Aug 20 2021

    Registration deadline

Sponsored By
IEEE
Tongji University
Chinese Computer Federation
Organized By
Tongji University
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