Introduction

New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D - system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices.

Call for paper

The Symposium calls for papers in the following areas:

Advanced CMOS Platforms, Interconnect and Backside Power Delivery Network (BSPDN) Technologies

Advanced packaging, Chiplet and Heterogeneous Integration Technologies Including 2.5D and 3D

Analog and Mixed-Signal Circuits

Beyond CMOS Devices That Utilize New Physics Including Spin, Optical and Quantum Computing

Biomedical devices, circuits, and systems

Computing / Processing in Memory

Data converters

Device physics, Characterization, Modeling and Reliability

Devices and Accelerators for ML/DL and New Compute

Digital Circuits, Hardware Security, Signal Integrity, IOs

DTCO and Design Enablement

 Frequency Generation and Clocking Circuits

Memory Technologies, Devices, Circuits, and Architectures

Power Management Devices and Circuits

Processes and Materials for CMOS Scaling and New Devices

Processors and SoCs

Sensors, Imagers, IoT, MEMS, Display Circuits

Wireless and RF Devices Circuits and Systems

Wireline and Optical Transceivers, Optical Interconnects

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Important Date
  • Conference Date

    Jun 14

    2026

    to

    Jun 18

    2026

  • Jun 18 2026

    Registration deadline

Sponsored By
IEEE Electron Devices Society
IEEE Solid-State Circuits Society
Japan Society of Applied Physics - JSAP
Organized By
IEEE Electron Devices Society
IEEE Solid-State Circuits Society
Japan Society of Applied Physics - JSAP
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