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Introduction
The ever-increasing need for enhanced productivity in designing highly complex electronic systems drives the evolution of design methods beyond traditional approaches. Virtual prototyping, design space exploration and system synthesis are needed to design optimized systems, comprising hardware and software implementations. Electronic system-level (ESL) design promises to provide system architects with the right tools to make the right decisions about the system architecture at early stages of the design process. This includes methodologies and synthesis techniques that are supported by appropriate ESL models. Furthermore, a well-connected ESL-to-implementation design flow is needed. Overall, designing at higher levels of abstraction coupled with the right tool support is a viable way to better cope with the system design complexity, by increasing code reuse and allowing components to be verified earlier in the design process. The Electronic System Level Synthesis Conference - ESLsyn focuses on automated system design methods that enable efficient modelling, synthesis, exploration and verification of systems from high-level specifications down to lower level implementations. Target Audience This conference will provide an overview of existing and emerging solutions provided by both industrial partners (EDA companies) and research institutions in the domain of ESL design and synthesis. It will give an outline of synthesis methods and tools currently available in the market and discuss their applicability, performance, strengths and user experiences. Finally, the event will create a platform to foster discussion and exchange between providers of synthesis technology and industry users, as well as as serving as a forum to discuss scientific concepts and paradigms for the future evolution of synthesis methods.
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Submission Topics

ESLsyn will focus on the five key tasks related to the design and verification of complex, programmable electronic products: The development of product architectures and specifications, including the incorporation and configuration of IP The mapping of a
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Important Date
  • Conference Date

    May 31

    2013

    to

    Jun 01

    2013

  • Jun 01 2013

    Registration deadline

Sponsored By
IEEE Council on Electronics Design Automation