Memory continues to be a major bottleneck in almost all computing systems. It is becoming more so as more cores and agents are sharing parts of the memory system and as applications that run on the cores are becoming increasingly data intensive. Continuing the tradition of seven previous successful incarnations, MSPC 2013 will provide a forum for publishing and discussing all aspects of memory performance and correctness on a variety of systems (multi-core, desktop, embedded, server/cloud, high-performance computing, sensor, etc) and related software and hardware innovations at various levels of the technology stack. We invite new submissions that tackle issues in memory system performance, efficiency, correctness, and dependability in both hardware and software layers.
Call for paper
Submission Topics
Example areas of interest include but are not limited to the following:
Hardware, software, and hybrid techniques for better memory performance, correctness, reliability, efficiency
Memory hierarchy design for chip multiprocessors (CMPs)
Emerging memory
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