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Introduction

VARI 2014 is the 5th European Workshop on CMOS Variability. The increasing variability in CMOS transistor characteristics, as well as its sensitivity to environmental variations has become a major challenge to scaling and integration. This leads to major changes in the way that future integrated circuits and systems are designed. Strong links must be established between circuit design, system design and device technology. The VARI workshop answers to the need to have an European event on variability in CMOS technology development and circuit design, where industry and academia meet. VARI objective is to provide a forum to discuss and investigate the CMOS process and environmental variability issues in methodologies and tools for the design of current and upcoming generations of integrated circuits and systems. The technical program will focus on performance and power consumption as well as architectural aspects like adaptability or resilience, with particular emphasis on modeling, design, characterization, analysis and optimization in respect to variability. Digital, Analog, Mixed Signal and RF circuits are within VARI scope. The venue of VARI 2014 will be the University of Balearic Islands (UIB), Spain. As year, VARI 2014 will be collocated with PATMOS 2014, a reference workshop on Power and timing modeling, optimization and simulation.

Call for paper

Important date

2014-06-25
Abstract submission deadline

Submission Topics

T1- Modeling and Simulation of Variations: from Physics to Circuits Global, Systematic and Random process variations - Environmental variations (Power supply, Temperature, Electromagnetic Interferences, Ions or Electro-magnetic radiations) - Aging mechanisms, Atomistic and Monte Carlo simulations, Compact modeling, Variability in emerging devices. T2- Design Tools and Methodologies for Variability Multi-Corners approaches including margining, Statistical approaches Tools for variability at design, layout and post-layout levels. Regular layout, Restricted Design Rules, Optical Proximity Corrections, Design For Manufacturability. T3- Sensors and Actuators for Variability Compensation Process sensors, Temperature sensors, Direct and Indirect Performance sensors, Power and Energy sensors, Power supply and voltage droop sensors, Timing slacks and faults sensors, Multisensors fusion. Global and Local Voltage scaling, Current biasing, Body biasing, Frequency scaling, Delay Tuning. T4- Compensation Techniques of Digital Circuits New digital building blocks with enhanced robustness, Asynchronous design, desynchronized techniques, Clock tree resynchronization. T5- Compensation Techniques of Analog and RF Circuits New analog/RF building blocks with enhanced robustness, Design centering, Operating Point tracking. T6- Compensation at Architectural Level Compensation loops for performances tuning, Global or distributed, static or dynamic optimization, Tasks remapping according to hardware capabilities.
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Important Date
  • Conference Date

    Sep 29

    2014

    to

    Oct 01

    2014

  • Jun 25 2014

    Abstract Submission Deadline

  • Oct 01 2014

    Registration deadline

Sponsored By
Universitat de les Illes Balears
Contact Information
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