2016 IEEE Silicon Nanoelectronics Workshop (SNW)

Scope

• Nanometer-scale transistors, including those employing non-classical structures, novel channel and source/drain materials, or non-thermal injection mechanism.
• Junction and insulator materials and process technology for nanoelectronic devices.
• Techniques for fabrication of nanostructures, including nanometer scale patterning.
• Physics of nanoelectronic devices, e.g. quantum effects, non-equilibrium transport.
• Modeling and simulation of nanoelectronic devices, e.g. including atomistic effects.
• Nanoscale surface, interface, and heterojunction effects in devices.
• Device scaling issues including doping fluctuations and atomic granularity.
• Circuit design issues and novel circuit architectures, including quantum computing, for nanoelectronic devices.
• Optoelectronics using silicon nanostructures.
• Techniques targeting zero power electronics (self-supplying), including wireless sensors, energy harvesting, steep slope devices, ultra-low power design and devices.
• Devices for 3D and heterogeneous integration on Silicon, including Graphene, III-V devices, CNT, spin-based devices, MEMS and NEMS, etc.
• Novel transistors based on two dimensional materials, e.g. MoS₂, WS₂, etc.
• Integrated energy harvesting and energy storage based on new material and structures.
• Low power integrated sensors for Internet-of-Things.