Introduction

The 19th ACM/IEEE System Level Interconnect Prediction 2017 workshop will take place at the Austin Convention Center, Austin, TX on June 17, 2017. It will be co-located with 54th ACM/EDAC/IEEE Design Automation Conference, June 18-22, 2017.

Call for paper

Important date

2017-03-11
Abstract submission deadline
2017-04-01
Draft paper submission deadline
2017-04-22
Draft paper acceptance notification
2017-05-01
Final paper submission deadline

Submission Topics

  • Interconnect prediction and optimization at various IC and system design stages

  • System-level design for FPGAs, NOCs, reconfigurable systems

  • Design, analysis, and optimization of power and clock networks Interconnect reliability Interconnect topologies and fabrics of multi- and many-core architectures

  • Design-for-manufacturing (DFM) and yield techniques for interconnects

  • High speed chip-to-chip interconnect design

  • Design and analysis of chippackage interfaces

  • Power consumption of interconnects

  • 3D interconnect design and prediction

  • Emerging interconnect technologies

  • Applications of interconnects to social, genetic, and biological systems

  • Co-optimization of interconnect technology and chip design

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Important Date
  • Jun 17

    2017

    Conference Date

  • Mar 11 2017

    Abstract Submission Deadline

  • Apr 01 2017

    Draft paper submission deadline

  • Apr 22 2017

    Draft Paper Acceptance Notification

  • May 01 2017

    Final Paper Deadline

  • Jun 17 2017

    Registration deadline

Sponsored By
Association for Computing Machinery Special Interest Group on Design Automation - ACM SIGDA
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