The 19th ACM/IEEE System Level Interconnect Prediction 2017 workshop will take place at the Austin Convention Center, Austin, TX on June 17, 2017. It will be co-located with 54th ACM/EDAC/IEEE Design Automation Conference, June 18-22, 2017.
Interconnect prediction and optimization at various IC and system design stages
System-level design for FPGAs, NOCs, reconfigurable systems
Design, analysis, and optimization of power and clock networks Interconnect reliability Interconnect topologies and fabrics of multi- and many-core architectures
Design-for-manufacturing (DFM) and yield techniques for interconnects
High speed chip-to-chip interconnect design
Design and analysis of chippackage interfaces
Power consumption of interconnects
3D interconnect design and prediction
Emerging interconnect technologies
Applications of interconnects to social, genetic, and biological systems
Co-optimization of interconnect technology and chip design
Jun 17
2017
Conference Date
Abstract Submission Deadline
Draft paper submission deadline
Draft Paper Acceptance Notification
Final Paper Deadline
Registration deadline
2015-06-06 United States
2015 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)2014-06-01 United States
2014 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)2013-06-02 United States
2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)
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