2016 IEEE 25th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)

System-level, board-level and on-chip interconnects

High-speed channels, links, backplanes, serial and parallel interconnects, SerDes

Low power mobile and personal applications

Multiconductor transmission lines

Memory and DDR interfaces

Jitter and noise management

Signal and thermal integrity

Power integrity and power distribution networks (PDNs)

Electronic packages and microsystems

3D interconnects, 3D packages, TSVs and MCMs

Nano interconnects and nano structures

RF/microwave packaging structures, RFICs, mixed signal modules and wireless switches

Package-chip co-design

Electromagnetic (EM) and EM interference modeling, simulation algorithms, tools and flows

Macromodeling and model order reduction as it applies to electrical analysis

Advanced and parallel CAD techniques for signal, power and thermal integrity analysis

Measurement and data analysis techniques for system-level and on-chip structures.