Introduction

The IEEE International Conference on 3D System Integration (3D IC) will be held in San Francisco, California on November 8-10, 2016. This conference combines the previous ASET and IEEE EDS Japan sponsored International 3D System Integration Conference, held in Tokyo in 2007 & 2008 and the IEEE CPMT sponsored 3D System Integration Conference held in 2003 & 2007 in Munich. After the first combined conference in San Francisco in 2009, the 2nd IEEE International Conference on 3D System Integration was held in Munich in 2010, the 3rd conference in Osaka in 2012, the forth conference in San Francisco in 2013, the fifth conference in Cork in 2014, and the sixth conference in Sendai in 2015. 3D IC will cover all 3D IC topics, including 3D process technology, materials, equipment, circuits technology, design methodology and applications.

Call for paper

Submission Topics

Papers are solicited in subject topics, including, but not limited to, the following:

  • 3D IC Technology. Through Silicon Vias (TSV), wafer thinning, wafer alignment, wafer bonding, wafer dicing, 3D IC process, monolithic 3D integration, heterogeneous 3D integration, Capacitive coupling, Inductive coupling, multilevel epitaxial growth, etc.

  • 3D IC Circuits Technology. 3D SOC, 3D Memory, 3D Processor, 3D DSP, 3D FPGA, 3D RF and microwave/millimeter wave, 3D analog circuits, 3D Biomedical circuits etc.

  • 3D Applications. Imaging, memory, processors, communications, networking, wireless, biomedical etc.

  • 3D Design Methodology. 3D CAD, 3D synthesis, 3D design flows, Signal and power integrity analysis and design in 3D, 3D thermal design and analysis, test and design for test; 3D mechanical stress and reliability design and analysis, etc.

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Important Date

  • Conference Date

    Nov 08

    2016

    to

    Nov 11

    2016

  • Nov 11 2016

    Registration deadline

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