Introduction

The 3D-TEST Workshop focuses exclusively on test of and design-for-test for three-dimensional stacked ICs (3D-SICs), including Systems-in-Package (SiP), Package-on-Package (PoP), and especially 3D-SICs based on Through-Silicon Vias (TSVs), micro-bumps, and/or interposers. While 3D-SICs offer many attractive advantages with respect to heterogeneous integration, smaller form-factor, higher bandwidth and performance, and lower power dissipation, there are many open issues with respect to testing such products. The 3D-TEST Workshop offers a forum to present and discuss these challenges and (emerging) solutions among researchers and practitioners alike.

3D-TEST will take place in conjunction with the IEEE International Test Conference (ITC) and is sponsored by the Test Technology Technical Council (TTTC) of IEEE Computer Society.

Call for paper

Important date

2016-10-01
Draft paper submission deadline
2016-11-01
Final paper submission deadline

Submission Topics

The workshop's areas of interest include (but are not limited to) the following topics:

  • Defects due to Wafer Thinning

  • Defects in Intra-Stack Interconnects

  • DfT Architectures for 3D-SICs

  • EDA Design-to-Test Flow for 3D-SICs

  • Failure Analysis for 3D-SICs

  • Fault-Tolerant Design for 3D-SICs

  • Handling and Testing Singulated Stacks

  • Interposer Testing

  • Known-Good Die / Stack Testing

  • Power and Heat Dissipation during Test

  • Pre-Bond, Mid-Bond and Post-Bond Testing

  • Reliability of 3D-SICs

  • Stacking Yield of Dies and Interconnects

  • Standardization for 3D Testing

  • Supply Chain and Logistic Issues

  • System/Board Test Issues for 3D-SICs

  • Test Cost Modeling for 3D-SICs

  • Test Flow Optimization for 3D-SICs

  • Tester Architecture incl. ATE and BIST

  • Thermal/Mechanical Stress in 3D-SICs

  • TSV Test, Redundancy, and Repair

  • Wafer Probing and Probe Marks of 3D-SICs
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Important Date
  • Conference Date

    Nov 15

    2016

    to

    Nov 17

    2016

  • Oct 01 2016

    Draft paper submission deadline

  • Nov 01 2016

    Final Paper Deadline

  • Nov 17 2016

    Registration deadline

Contact Information