The International Workshop on Logic and Synthesis is the premier forum for research in synthesis, optimization, and verification of integrated circuits and systems. Research on logic synthesis for emerging technologies and for novel computing platforms, such as nanoscale systems and biological systems, is also strongly encouraged. The workshop encourages early dissemination of ideas and results. The workshop accepts complete papers highlighting important new problems in the early stages of development, without providing complete solutions. The emphasis is on novelty and intellectual rigor.
Topics of interest include, but are not limited to: hardware synthesis and optimization; software synthesis; hardware/software co-synthesis; power and timing analysis; testing, validation and verification; synthesis for reconfigurable architectures; hardware compilation for domain-specific languages; design experiences. Submissions on modeling, analysis and synthesis for emerging technologies and platforms are particularly encouraged.
Jun 17
2017
Jun 18
2017
Abstract Submission Deadline
Draft paper submission deadline
Draft Paper Acceptance Notification
Final Paper Deadline
Registration deadline
2024-06-06 Switzerland Zurich
2024 IEEE/ACM 33rd International Workshop on Logic and Synthesis (IWLS)2021-07-19 Virtual Conference
2021 30th International Workshop on Logic and Synthesis2018-06-23 United States
2018 27th International Workshop on Logic and Synthesis2016-06-10 United States Austin, USA
2016 25th International Workshop on Logic and Synthesis2014-05-30 United States
2014 IEEE International Workshop on Logic and Synthesis2013-06-07 United States
International Workshop on Logic and Synthesis
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