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〔CLOSED〕
Introduction
The International Workshop on Logic and Synthesis is the premier forum for research in synthesis, optimization, and verification of integrated circuits. Research on logic synthesis for emerging technologies and for novel computing platforms, such as nanoscale systems and biological systems, is also strongly encouraged. The workshop accepts complete papers highlighting important new problems in the early stages of development, without providing complete solutions. The emphasis is on novelty and intellectual rigor.
Call for paper

Submission Topics

Topics of interest include (but are not limited to): synthesis and optimization; power and timing analysis; testing, validation and verification; architectures and compilation; and design experiences. Submissions on modeling, analysis and synthesis for em
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Important Date
  • Conference Date

    Jun 07

    2013

    to

    Jun 08

    2013

  • Jun 08 2013

    Registration deadline

Sponsored By
IEEE 美国计算机学会