Introduction

The International Workshop on Logic and Synthesis is the premier forum for research in synthesis, optimization, and verification of integrated circuits and systems. Research on logic synthesis for emerging technologies and for novel computing platforms, such as nanoscale systems and biological systems, is also strongly encouraged. The workshop encourages early dissemination of ideas and results. The workshop accepts complete papers highlighting important new problems in the early stages of development, without providing complete solutions. The emphasis is on novelty and intellectual rigor.

Topics of interest include, but are not limited to: hardware synthesis and optimization; software synthesis; hardware/software co-synthesis; power and timing analysis; testing, validation and verification; synthesis for reconfigurable architectures; hardware compilation for domain-specific languages; design experiences. Submissions on modeling, analysis and synthesis for emerging technologies and platforms are particularly encouraged.

The workshop format includes paper presentations, posters, invited talks, social lunch and dinner gatherings, and recreational activities. Accepted papers are distributed exclusively to IWLS participants.

Call for paper

Important date

2018-03-04
Abstract submission deadline
2018-03-11
Draft paper submission deadline
2018-04-15
Draft paper acceptance notification
2018-05-13
Final paper submission deadline
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Important Date
  • Conference Date

    Jun 23

    2018

    to

    Jun 24

    2018

  • Mar 04 2018

    Abstract Submission Deadline

  • Mar 11 2018

    Draft paper submission deadline

  • Apr 15 2018

    Draft Paper Acceptance Notification

  • May 13 2018

    Final Paper Deadline

  • Jun 24 2018

    Registration deadline

Organized By
Association for Computing Machinery Special Interest Group on Design Automation - ACM SIGDA
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