The IEEE A-SSCC 2022 (Asian Solid-State Circuits Conference) is an international forum for presenting the most updated and advanced chips and circuit designs in solid-state and semiconductor fields. The conference is supported by the IEEE Solid-State Circuits Society and will be held in Asia. Further details on the conference and paper submission guidelines and templates will be available at the A-SSCC official website around the beginning of April 2022.
Sponsor Type:1
Conference Chair
Robert Li, Synopsys
Organizing Committee Chair
Shuenn-Yuh Lee, National Cheng Kung University
Organizing Committee Vice Chair
Tsung-Hsien Lin, National Taiwan University
Secretary
Chia-Hsiang Yang, National Taiwan University
Treasurer
Tsung-Te Liu, National Taiwan University
Publicity
Pei-Yun Tsai, National Central University
Publication
Ping-Hsuan Hsieh, National Tsing Hua University
Local Arrangement
Soon-Jyh Chang, National Cheng Kung University
Tsung-Heng Tsai, National Chung Cheng University
TPC Liaison
Po-Hung Chen, National Yang Ming Chiao Tung University
1.Analog Circuits & Systems: Amplifiers, comparators, switched capacitor circuits, continuous-time & discrete-time filters, voltage/current references; DC-DC converters, power-control circuits; IF/baseband analog circuits, AGC/VGA; non-linear analog circuits.
2.Data Converters: Nyquist-rate and oversampling A/D, D/A converters, time-to-digital converters, and capacitance-to-digital converters; sub-circuits for data converters including sample-and-hold circuits, calibration circuits, etc.
3.Digital Circuits & Systems: Design, fabrication, and test of digital VLSI systems; high-speed low-power digital circuits, power-reduction and management methods for digital VLSI, ultra-low-voltage and sub-threshold logic design; leakage reduction techniques; clock distribution, I/O circuits, reconfigurable logicarray circuits; supply/substrate noise measurement and cancellation for digital VLSI, variation and fault-tolerant circuits.
4.SoC & Signal Processing Systems: System-on-chip (including 3D integration), microprocessors, network processors, baseband communication processing system & architectures, system-level power management; multimedia and recognition processing systems; cryptographic, security, machine learning, deep-learning, and neuromorphic circuits and systems; bio-medical/neural-network processors and sensor network systems.
5.Wireless: Receivers/transmitters/transceivers for wireless systems; narrowband RF, ultra-wideband and millimeter-wave circuits; circuits and building-blocks including RF front-end, LNA, mixer, power amplifiers, VCOs, frequency synthesizers, RF filters, RF switches, power detectors, active antennas.
6.Wireline: Receivers/transmitters/transceivers for wireline systems; optical/electrical data links and backplane transceivers; power-line communication; clock generation circuits, PLL, DLL, spread-spectrum clock generation; building blocks for high-speed wireline communication; analog-digital mixed-mode circuits.
7.Emerging Technologies and Applications: Advanced system designs and circuit solutions for technologies and applications including state-of-the-art devices and packaging technologies; flexible and printable electronics; silicon photonics; smart sensors and transducers; MEMS for analog, RF, and sensor applications; image sensors and displays; energy harvesting systems; transceiver systems; medical/bio-electronics/bio-inspired chip design, artificial intelligent system, and cryogenic circuits and systems.
8.Memory: Volatile and Non-volatile memory; new memory designs for 3D/2D architectures, emerging devices such as resistive-/phase change-/magnetic- /ferroelectric- memory devices; data storage and multi-bit-cell memory design; cache-memory system, multi-port memory, memory subsystem, processing in memory, and CAM design; yield-enhancing and ECC techniques; memory testing and built-in self-test.
9.FPGA: Novel algorithm and/or architecture for integrated circuits validated by FPGA implementation. The authors of accepted papers are required to participate in demo sessions.
Prospective authors are invited to submit two-page manuscripts, including figures, tables and references, to the official A-SSCC 2022 website. The two-page submission could include one-page additional supplements with figures and figure captions. Supplementary figures should not be referred to in the text of the paper.
Nov 06
2022
Nov 09
2022
Draft paper submission deadline
Draft Paper Acceptance Notification
Final Paper Deadline
Registration deadline
2026-11-01 Taiwan, China Taichung
2026 IEEE Asian Solid-State Circuits Conference2024-11-18 Japan Hiroshima
2024 IEEE Asian Solid-State Circuits Conference (A-SSCC)2023-11-05 China Haikou
2023 IEEE Asian Solid-State Circuits Conference2021-11-07 South Korea Busan
2021 IEEE Asian Solid-State Circuits Conference2018-11-05 Taiwan, China
2018 IEEE Asian Solid-State Circuits Conference2017-11-06 South Korea
2017 IEEE Asian Solid-State Circuits Conference2016-11-07 Japan Toyama, Japan
2016 IEEE Asian Solid-State Circuits Conference2014-11-10 China 台北市
2014 IEEE Asian Solid-State Circuits Conference2013-11-11 Singapore
2013 IEEE Asian Solid-State Circuits Conference
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