Abstract List
My Submissions
682
Overview of Co-design Considerations for ESD Protection in System-in-Packages (SiPs)Final Paper

Huang Xiaozong*

Plenary Track > Device and Circuit Reliability

656
Effects of different energy proton irradiation on DC characteristics of InP-based HEMTFinal Paper

Yinghui Zhong*

Plenary Track > Device and Circuit Reliability

654
A New dual directional SCR with high holding voltage for High Voltage ESD protectionFinal Paper

Shiyu Song*, Feibo Du, Fei Hou, Wenqiang Song, Zhiwei Liu, Jizhi Liu

Plenary Track > Device and Circuit Reliability

652
Compact and Compound SCR structure for full chip ESD protectionFinal Paper

Xiaoyu Dong*, Feibo Du, Fei Hou, Wenqiang Song, Zhiwei Liu, Jizhi Liu

Plenary Track > Device and Circuit Reliability

651
Enhanced LVTSCR with High Holding Voltage in Advanced CMOS technologyFinal Paper

Meichen Huang*, Feibo Du, Zhiwei Liu, Jizhi Liu, Fei Hou, Wenqiang Song

Plenary Track > Device and Circuit Reliability

645
A Novel Highly Reliable 12T SRAM Bitcell DesignFinal Paper

Jianwei Jiang*, Dianpeng Lin, Jun Xiao, Shichang Zou

Plenary Track > Device and Circuit Reliability

641
Failure Analysis for GaAs MMIC Amplifier with Metallized Via HoleFinal Paper

Ting He*

Plenary Track > Device and Circuit Reliability

622
A Review of Radiation Effects in Double-SOI TechnologiesDraft Rejected

Yang Huang*, Binhong Li, Bo Li, Jiantou Gao, Xiaohui Su, Hainan Liu, Zhengsheng Han, Jiajun Luo

Plenary Track > Device and Circuit Reliability

619
Effect of trench bottom implantation on the reliability of trench MOSFETDraft Rejected

Gong Xueqin*

Plenary Track > Device and Circuit Reliability

610
An SET Generation Circuit with Tunable Pulse WidthFinal Paper

Xiaohui Su, Bo Li*, Hainan Liu, Binhong Li, Lei Wang, Jiajun Luo, Zhengsheng Han

Plenary Track > Device and Circuit Reliability

609
Investigation of Electrical Performance and Reliability of Memristors by Tuning Compliance Current During Electroforming ProcessFinal Paper

Yuqi Wang, Wei Xu, Yihao Chen, Yi Tong*, Fei Gao, Xinwei Liu, Liqun Lu, Yuefeng Li, Dawei Du, Rong Wang, Mingmin Shi, Lvyang Zhou, Jin Zhou, Miucheng Zhang, Xiang Wan, Xiaojuan Lian

Plenary Track > Device and Circuit Reliability

596
An Adaptive Single Event Upset(SEU)-Hardened Flip-Flop DesignFinal Paper

Man Zhang*, ZhongJie Guo, WanCheng Xu

Plenary Track > Device and Circuit Reliability

568
Bonding Wires for Power Modules: from Aluminum to CopperFinal Paper

Nan Jiang*, Zilan Li

Plenary Track > Device and Circuit Reliability

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Important Date
  • Conference Date

    Jun 12

    2019

    to

    Jun 14

    2019

  • Jun 12 2019

    Draft paper submission deadline

  • Jun 14 2019

    Registration deadline

Organized By
Xi'an University of Technology
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