2016 International Conference on Microelectronic Test Structures (ICMTS)

Suggested topics include (but are not limited to):

• Material and Process Characterization: Evaluation of wafer start materials (Si, SiGe, strained silicon, SOI, III-V, II-VI, etc.), dielectrics (high-k gate, low-k interconnect), homoepitaxial and heteroepitaxial layers. resistivity, mobility, stress, contact  resistance, dielectric, and interconnect measurements.
• Replicated Feature Metrology: Electrical and non-electrical characterization of level-to-level registration, feature placement, critical dimension, mask and reticle process control.
• Manufacturing of Integrated Circuits and MEMS: Evaluation of individual and groups of integrated circuits, device and MEMS process steps and elements: transistors, diodes, mechanical structures, device isolation, memory cells and interconnect. Assessment of MMICs, RF components, 3D integration and multi chip packages.
• MEMS, NEMS, and Microfluidics (including Bio): Test structures and methods for evaluating electro-mechanical devices, such as actuators, sensors, switches, and microfluidic devices.
• Large Area Electronics and Emerging Devices: Test structures for evaluating displays, printed electronics/ flexible devices,  power devices, photovoltaics, as well as emerging devices, such as organic / oxide-based / biomolecular / spintronic devices, MRAMs ReRAMs, normally-off devices, teraherz devices, nano-structures, and related materials.
• Device and Circuit Modeling, Parameter Extraction: Model parameter extraction, RF device modeling, de-embedding, pulsed measurements, DC / AC / high frequency measurement techniques and applications.
• Reliability and Product Failure Analysis: Test structures and methods for transistor / thin film / dielectric / interconnect reliability evaluation, quality assurance, thermal monitoring and analysis, accelerated wafer level tests, wafer level burn-in, and reliability prediction.
• Matching and Variability Test Structures: Mismatch / variability characterization and modeling of components (transistors, resistors, capacitors, inductors, mechanical components) and circuits.
• Technology R&D, Integration, and DFM: Test structures for FEOL or BEOL evaluation, design rule determination, process uniformity and worst-case analysis, assessment of integration and new technologies. Calibration of DFM models such as lithography, OPC, CMP, or parametric variation. Evaluation and optimization of standard cell macros and other product circuits.
• Yield Enhancement and Production Process Control: Yield enhancement structures and methods, yield modeling, statistical process control, defect estimation  structures and methods, failure identification and characterization, many-component / matrix test circuitry for technology assessment, evaluation of design-manufacturing interactions (DFY).
• Test Circuits:  Novel on-wafer circuits for characterization of manufacturing technologies, variability, yield, and performance. Circuits to simplify probing, improve measurement robustness, and reduce pad count.
• Test Structure Design Methods:  Flows  for  automated  test  structure design,generation, and verification; design-for-analysis, parameterized design,layout  issues (grid, hierarchy, misalignment), switched arrays.
• Test Structure Utilization Strategy: Test equipment, probing and programmable testing for process diagnostics, test throughput optimization, database and data analysis methods, statistical data analysis, expert systems, and related techniques